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Formal Methods in Computer-Aided Design(计算机辅助设计中的形式方法/会议录)

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Formal Methods in Computer-Aided Design(计算机辅助设计中的形式方法/会议录)

最 低 价:¥610.20

定 价:¥678.00

作 者:Alan J. Hu 著

出 版 社:北京燕山出版社

出版时间:2007-12-1

I S B N:3540237380

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The LNCS series reports state-of-the-art results in computer science research, development, and education, at a high level and in both printed and electronic form. Enjoying tight cooperation with the R&D community,with numerous individuals, as well as with prestigious organizations and societies, LNCS has grown into the most comprehensive computer science research forum available.
The scope of LNCS, including its subseries LNAI and LNBI, spans the whole range of computer science and information technology including interdisciplinary topics in a variety of application fields. The type of material published traditionally includes
-proceedings (published in time for the respective conference)
-post-proceedings (consisting of thoroughly revised final full papers)
-research monographs (which may be based on outstanding PhD work,research projects, technical reports, etc.)

内容简介

This book constitutes the refereed proceedings of the 5th International Conference on Formal Methods in Computer-Aided Design, FMCAD 2004, held in Austin, Texas, USA in November 2004.
The 29 revised full papers presented together with the abst of an invited talk were carefully reviewed and selected from 69 submissions. The papers address all current issues on tools, methods, algorithms, and foundational theory for the application of formalized reasoning to all aspects of computer-aided systems design, including specification, verification, synthesis, and testing.

作者简介

目录

Challenges in System-Level Design
Generating Fast Multipliers Using Clever Circuits
Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques
A Methodology for the Formal Verification of FFT Algorithms in HOL ..
A Fhnctional Approach to the Formal Specification of Networks on Chip.
Proof Styles in Operational Semantics
Integrating Reasoning About Ordinal Arithmetic into ACL2
Combining Equivalence Verification and Completion ~nctions
Synchronization-at-Retirement for Pipeline Verification
Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs
Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders
Scalable Automated Verification via Expert-System Guided Transformations
Simple Yet Efficient Improvements of SAT Based Bounded Model Checking
Simple Bounded LTL Model Checking
QuBE++: An Efficient QBF Solver
Bounded Probabilistic Model Checking with the Mur Verifier
Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States
Bounded Verification of Past LTL
A Hybrid of Counterexample-Based and Proof-Based Abstraction
Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis
Approximate Symbolic Model Checking for Incomplete Designs
Extending Extended Vacuity
Parameterized Vacuity
An Operational Semantics for Weak PSL
Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking
Bloom Filters in Probabilistic Verification
A Simple Method for Parameterized Verification of Cache Coherence Protocols
……
Author Index

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