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| 序 v Preface xi 1 NUMBER SYSTEMS 1.1 Binary Number System 3 1.2 Binary to Decimal Conversion 4 1.3 Decimal to Binary Conversion 6 1.4 Octal Number System 9 1.5 Binary to Octal Conversion 11 1.6 Octal to Binary Conversion 12 1.7 Hexadecimal Number System 13 1.8 Binary to Hexadecimal Conversion 14 1.9 Hexadecimal to Binary Conversion 15 1.10 Binary-Coded Decimal （BCD） 16 1.11 Binary Addition 20 1.12 Binary Subtraction 22 1.13 Troubleshooting a 4-Bit Adder 24 Digital Application 26 Summary 27 Questions and Problems 28 Lab 1A 7483 4-Bit FullAdder 30 Lab 1B 4008 4-Bit Full Adder 36 2 LOGIC GATES 41 2.1 Gates 43 2.2 Inverters 43 2.3 OR Gates 45 2.4 AND Gates 50 2.5 NAND Gates 55 2.6 NOR Gates 59 2.7 Data Control Enable/Inhibit 63 2.8 AND Gate Enable/Inhibit 63 2.9 NAND Gate Enable/Inhibit 64 2.10 OR Gate Enable/Inhibit 65 2.11 NOR Gate Enable/Inhibit 66 2.12 Summary Enable/Inhibit 67 2.13 NAND as an Inverter 68 2.14 NOR as an Inverter 68 2.15 Expanding an AND Gate 68 2.16 Expanding a NAND Gate 69 2.17 Expanding an OR Gate 69 2.18 Expanding a NOR Gate 69 2.19 Troubleshooting Gates 70 Digital Application 71 Summary 72 Questions and Problems 74 Lab2A Gates 78 Lab2B Gates 82 3 WAVEFORMS AND BOOLEAN ALGEBRA 85 3.1 Waveform Analysis 87 3.2 Delayed-Clock and Shift-Counter Wave forms 90 3.3 Combinational Logic 98 3.4 Boolean Theorems 100 3.5 DeMorgans Theorems 107 3.6 Designing Logic Circuits 112 3.7 AND-OR-Invert Gates 123 3.8 Reducing Boolean Expressions Using Karnaugh Maps 126 3.9 Programmable Logic Devices 128 3.10 Troubleshooting Combinational Logic Circuits 132 Digital Application 134 Summary 135 Questions and Problems 137 Lab 3A Boolean Algebra 146 Lab 3B Logic Converter 150 4 EXCLUSIVE-OR GATES 153 4.1 Exclusive-OR 155 4.2 Enable/Inhibit 158 4.3 Waveform Analysis 159 4.4 Exclusive-NOR 160 4.5 Parity 162 4.6 Even-Parity Generator 164 4.7 Even/Odd-Parity Generator 166 4.8 Parity Checker 168 4.9 9-Bit Parity Generator/Checker 170 4.10 Comparator 175 4.11 Programmable Logic Devices 181 4.12 Troubleshooting Exclusive-OR Circuits 193 Digital Application 194 Summary 195 Questions and Problems 196 Lab 4A Exclusive-Or 200 Lab 4B Parity Generator/Checker 202 5 ADDERS 205 5.1 Half Adder 207 5.2 Full Adder 208 5.3 Binary ls Complement Subtraction 216 5.4 1 s Complement Adder/Subtractor Circuit 218 5.5 Binary 2s Complement Subtraction 223 5.6 2s Complement Adder/Subtractor Circuit 226 5.7 Signed 2s Complement Numbers 232 5.8 Binary-Coded-Decimal Addition 238 5.9 Binary-Coded-Decimal Adder Circuit 240 5.10 Arithmetic Logic Unit （ALU） 243 5.11 Programming a GAL 245 5.12 Troubleshooting Adder Circuits 252 Digital Application 254 Summary 254 Questions and Problems 256 Lab 5A Adders 260 Lab 5B Adder Circuits 262 6 SPECIFICATIONS AND OPEN-COLLECTOR GATES 265 6.1 TTL Subfamilies 267 6.2 TTL Electrical Characteristics 267 6.3 TTL Supply Currents 273 6.4 TTL Switching Characteristics 274 6.5 TTL Open-Collector Gates 278 6.6 Open-Collector Applications 280 6.7 CMOS 282 6.8 CMOS Subfamilies 282 6.9 CMOS Specifications 285 6.10 Interfacing TTL to CMOS 288 6.11 Low Voltage CMOS 291 6.12 Emitter Coupled Logic （ECL） 293 6.13 Interfacing ECL to Other Logic Families 295 6.14 Surface Mount Technology 296 6.15 GAL Specifications 298 6.16 Troubleshooting TTL and CMOS Devices 299 Digital Application 300 Summary 302 Questions and Problems 302 Lab 6A Specifications and OpenCollector Gates 304 Lab 6B Specifications and Open-Drain Inverters 307 7 FLIP-FLOPS 309 7.1 Introduction to Flip-Flops 311 7.2 Crossed NAND SET-RESET Flip-Flops 311 7.3 Crossed NOR SET-RESET Flip-Flops 313 7.4 Comparison of the Crossed NAND and the Crossed NOR SET-RESET Flip-Flops 315 7.5 Using a SET-RESET Flip-Flop as a Debounce Switch 316 7.6 The Gated SET-RESET Flip-Flop 317 7.7 The Transparent D Flip-Flop 319 7.8 The Master-Slave D Flip-Flop 322 7.9 The Pulse Edge-Triggered D Flip-Flop 328 7.10 SET-RESET NAND Gate Flip-Flops Using a PLD 328 7.11 Troubleshooting a Digital Circuit 333 Digital Application 335 Summary 336 Questions and Problems 337 Lab 7A Flip-Flops 339 Lab 7B Flip-Flops 340 8 MASTER-SLAVE O AND dK FLIP-FLOPS 341 8.1 Toggling a Master-Slave D Flip-Flop 343 8.2 The JK Flip-Flop 344 8.3 The Nonoverlapping Clock 347 8.4 The Shift Counter 349 8.5 Typical JK Flip-Flop ICS 352 8.6 Making a Nonoverlapping Clock 353 8.7 Trouble Shooting JK Flip-Flops 358 Digital Application 361 Summary 362 Questions and Problems 362 Lab 8A Shift Counter and Delayed Clock 365 Lab 8B JK Flip-Flops 368 9 SHIFT REGISTERS 369 9.1 Shift Register Constructed from JK Flip-Flops 371 9.2 Parallel and Serial Data 372 9.3 Parallel-In Serial-Out 373 9.4 Serial Data Transmission Formats 375 9.5 IC Shift Registers 379 9.6 Serial Data Standards 382 9.7 The ASCII Code 386 9.8 Making an 8-Bit Shift Register with an Asynchronous Clear from the GAL 16V8B Programmable Logic Device 388 9.9 Troubleshooting an RS-232C System 388 Digital Application 392 Summary 393 Questions and Problems 393 Lab 9A Shift Registers 395 Lab 9B Shift Registers 403 10 COUNTERS 405 10.1 The Ripple Counter 407 10.2 The Decode-and-Clear Method of Making a Divide-By-NRipple Counter 408 10.3 The Divide-By-N Synchronous Counter 410 10.4 Presettable Counters 414 10.5 The Up-Down Counter 416 10.6 Typical MSI Counter ICs 419 10.7 The Divide-By-N 1/2 Counter 425 10.8 Making a Divide-by-16 Synchronous Counter 426 10-9 Troubleshooting Counters 427 Digital Application 430 Summary 431 Questions and Problems 432 Lab 10A Counters 434 Lab 10B Counters 437 11 SCHMITT-TRIGGER INPUTS AND CLOCKS 439 11.1 The Schmitt-Trigger Input 441 11.2 Using a Schmitt Trigger to Square Up an Irregular Wave 441 11.3 A Schmitt-Trigger Clock 442 11.4 The 555 Timer Used as a Clock 445 11.5 Crystal Oscillators 451 11.6 Troubleshooting Clock Circuits 452 Digital Application 454 Summary 455 Questions and Problems 456 Lab 1 lA Schmitt Triggers and Clocks 459 Lab llB Clocks 461 12 ONE-SHOTS 463 12.1 A One-Shot Debounce Switch 465 I2.2 The Pulse Stretcher 465 12.3 The Retriggerable One-Shot 467 12.4 The Nonretriggerable One-Shot 469 12.5 The 555 as a One-Shot 470 12.6 The 74121 and 741S122 471 12.7 The Data Separator 473 12.8 Troubleshooting One-Shots 475 Digital Application 477 Summary 478 Questions and Problems 478 Lab 12A One-Shots 481 Lab 12B One-Shots 483 13 DIGITAL-TO-ANALOG AND ANALOG-TO-DIGITAL CONVERSIONS 485 13.1 Resistor Networks- for Digital-to-Analog Conversion 487 13.2 The TTL Digital-to-Analog Converter 491 13.3 Analog-to-Digital Conversion Using Voltage Comparators 494 13.4 The Count-Up and Compare Analog-to-Digital Converter 496 13.5 The Successive Approximation Analog-to-Digital Converter 498 13.6 The DAC0830 Digital-to-Analog Converter Integrated Circuit 502 13.7 Making the Logic for a 3-Bit Voltage Comparator Analog-to-Digital Converter 505 13.8 Troubleshooting Digital-to-Analog Converters 506 Digital Application 509 Summary 511 Questions and Problems 511 Lab 14A Digital-to-Analog and Analog-to-Digital 513 Lab 14B Analog-to-Digital Converters 515 14 DECODERS， MULTIPLEXERS， DEMULTIPLEXERS， AND DISPLAYS 517 14.1 Decoders 519 14.2 Demultiplexers 521 14.3 Multiplexers 522 14.4 Using a Multiplexer to Reproduce a Desired Truth Table 522 14.5 Multiplexer and Demultiplexer ICs 525 14.6 The 8-Trace Oscilloscope Multiplexer 528 14.7 The Light-Emitting Diode 530 14.8 The Seven-Segment Display 532 14.9 The Liquid Crystal Display 536 14.10 Making a 3-to-8 Decoder from the GAL 16V8B Programmable Logic Device 539 14.11 Troubleshooting Decoders 543 Digital Application 545 Summary 546 Questions and Problems 547 Lab 14a15 TRI-STATE GATES AND INTERFACING TO HIGH CURRENT 555 15.1 Tri-State Gates 557 15.2 Tri-State Inverters and Buffers 559 15.3 Computer Buses and the Tri-State Gate 562 15.4 Buffering to High Current and High Voltage 564 15.5 Multiplexing Seven-Segment LED Displays 567 15.6 Isolating One Circuit from Another with Optocouplers 569 15.7 Insulated Gate Bipolar Transistor （IGBT） 570 15.8 Troubleshooting High-Current Digital Circuits 572 Digital Application 573 Summary 574 Questions and Problems 575 Lab 15A Tri-State Gates 577 Lab 15B High-Current Interface 578 16 MEMORIES AND INTRODUCTION TO MICROCOMPUTERS 579 16.1 The Microcomputer and Its Parts 581 16.2 The Central Processing Unit 581 16.3 Computer Memory 584 6.4 ROM 585 16.5 PROM 586 16.6 EPROM 586 16.7 EEPROM 591 16.8 Static RAM 592 16.9 Dynamic RAM 593 16.10 The Input/Output of the Computer 597 16.11 The Program ， 600 16.12 The Microcontroller 602 Digital Application 604 Summary 606 Questions and Problems 606 Lab 16 RAM 608 Appendixes 611 A Lab Trainer Plans 613 B Equipment Needed 617 C Pinouts 619 D NAND Gates， MOS， and CMOS 627 Glossary 633 Answers to Self-Check and Odd-Numbered Questions and Problems 643 Index 717 Multiplexers， LEDs， and Seven-Segment Displays 549 Lab 14B LEDs 553 |
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