| 今天，集成电路设计技术高速发展，在各个领域得到广泛应用，已经成为一种横跨多学科的技术。《数字集成电路设计:从VLSI体系结构到CMOS制造(英文版)》从架构与算法讲起，介绍了功能验证、VHDL建模、同步电路设计、异步数据获取、能耗与散热、信号完整性、物理设计、设计验证等必备技术，还讲解了VLSI经济与项目管理，并简单阐释了CMOS技术的基础知识，全面覆盖了数字集成电路的整个设计开发过程。作为一本教科书，《数字集成电路设计:从VLSI体系结构到CMOS制造(英文版)》向工程专业学生展示了数字VLSl设计之美。揭示了各种技术难点，使他们避免重复前人的错误；作为一本技术参考书，《数字集成电路设计:从VLSI体系结构到CMOS制造(英文版)》内容全面，丰富的表格、清单、电路图和个案研究能够帮助正在开发硬件电路的在职工程师更好地完成自己的设计。《数字集成电路设计:从VLSI体系结构到CMOS制造(英文版)》特点·涵盖了数字VLSI设计的大部分问题·从算法设计到晶圆生产，以自顶向下方式一一讲述·重点阐释了流行的CMOS技术和静态电路·全面覆盖数字VLSI设计者需要知道的半导体物理知识·图文并茂，深度体现课堂教学和实际设计项目验证的思想 |
| Hubert Kaeslin 1985年于瑞士苏黎世联邦理工学院获得博士学位，现为该校微电子设计中心的负责人，具有20多年教授VLSI的丰富经验。 |
| chapter 1 introduction to microelectronics 1.1 economic impact 1.2 concepts and terminology 1.2.1 the guinness book of records point of view 1.2.2 the marketing point of view 1.2.3 the fabrication point of view 1.2.4 the design engineer's point of view 1.2.5 the business point of view 1.3 design flow in digital vlsi 1.3.1 the y-chart, a map of digital electronic systems 1.3.2 major stages in vlsi design 1.3.3 cell libraries 1.3.4 electronic design automation software 1.4 field-programmable logic 1.4.1 configuration technologies 1.4.2 organization of hardware resources 1.4.3 commercial products 1.5 problems 1.6 appendix i: a brief glossary of logic families 1.7 appendix ii: an illustrated glossary of circuit-related terms chapter 2 from algorithms to architectures 2.1 the goals of architecture design 2.1.1 agenda 2.2 the architectural antipodes 2.2.1 what makes an algorithm suitable for a dedicated vlsi architecture? 2.2.2 there is plenty of land between the architectural antipodes 2.2.3 assemblies of general-purpose and dedicated processing units 2.2.4 coprocessors 2.2.5 application-specific instruction set processors 2.2.6 configurable computing 2.2.7 extendable instruction set processors 2.2.8 digest 2.3 a transform approach to vlsi architecture design 2.3.1 there is room for remodelling in the algorithmic domain 62 2.3.2 ...and there is room in the architectural domain 2.3.3 systems engineers and vlsi designers must collaborate 2.3.4 a graph-based formalism for describing processing algorithms 2.3.5 the isomorphic architecture 2.3.6 relative merits of architectural alternatives 2.3.7 computation cycle versus clock period 2.4 equivalence transforms for combinational computations 2.4.1 common assumptions 2.4.2 iterative decomposition 2.4.3 pipelining 2.4.4 replication 2.4.5 time sharing 2.4.6 associativity transform 2.4.7 other algebraic transforms 2.4.8 digest 2.5 options for temporary storage of data 2.5.1 data access patterns 2.5.2 available memory configurations and area occupation 2.5.3 storage capacities 2.5.4 wiring and the costs of going off-chip 2.5.5 latency and timing 2.5.6 digest 2.6 equivalence transforms for nonrecursive computations 2.6.1 retiming 2.6.2 pipelining revisited 2.6.3 systolic conversion 2.6.4 iterative decomposition and time-sharing revisited 2.6.5 replication revisited 2.6.6 digest 2.7 equivalence transforms for recursive computations 2.7.1 the feedback bottleneck 2.7.2 unfolding of first-order loops 2.7.3 higher-order loops 2.7.4 time-variant loops 2.7.5 nonlinear or general loops 2.7.6 pipeline interleaving is not an equivalence transform 2.7.7 digest 2.8 generalizations of the transform approach 2.8.1 generalization to other levels of detail 2.8.2 bit-serial architectures 2.8.3 distributed arithmetic 2.8.4 generalization to other algebraic structures 2.8.5 digest 2.9 conclusions 2.9.1 summary 2.9.2 the grand architectural alternatives from an energy point of view 2.9.3 a guide to evaluating architectural alternatives 2.10 problems 2.11 appendix i: a brief glossary of algebraic structures 2.12 appendix ii: area and delay figures of vlsi subfunctions chapter 3 functional verification chapter 4 modelling hardware with vhdl chapter 5 the case for synchronous design chapter 6 clocking of synchronous circuits chapter 7 acquisition of asynchronous data chapter 8 gate- and transistor-level design chapter 9 energy efficiency and heat removal chapter 10 signal integrity chapter 11 physical design chapter 12 design verification chapter 13 vlsi economics and project management chapter 14 a primer on cmos technology chapter 15 outlook appendix a elementary digital electronics appendix b finite state machines appendix c vlsi designer’s checklist appendix d symbols and constants references index |
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