
| Rob Williams是位于英国布里斯托的西英格兰大学计算机系统技术学院院长。他在实时系统领域造诣颇深,同时还是GWE/GNE、Marconi Avionics和Nexos Office System的微处理器系统工程师。... .. << 查看详细 |
| preface. preface to the first edition recommended lab sessions part 1 basic functions and facilities of a computer 1 introduction: the hardware-software interface 1.1 computer systems - the importance of networking 1.2 hardware and software - mutual dependence 1.3 programming your way into hardware - vhdl, a language for electronic engineers 1.4 systems administration - we all need to know 1.5 voice, image and data - technological convergence 1.6 windowing interfaces - wimps 1.7 the global internet - connecting all the networks 1.8 using the pc - a case study; more reasons to study csa 2 the von neumann inheritance 2.1 base 2 - the convenience of binary - 10110011100011110000 2.2 stored program control - general-purpose machines 2.3 instruction codes - machine action repertoire 2.4 translation - compilers and assemblers 2.5 linking - bringing it all together 2.6 interpreters - executing high-level commands .2.7 code sharing and reuse - let's not write it all again! 2.8 data codes - numeric and character 2.9 the operating system - unix and windows 2.10 client-server computing - the way of the net 2.11 reconfigurable hardware - an alternative to fetch-execute 3 functional units and the fetch-execute cycle 3.1 the naming of parts - cpu, memory, io units 3.2 the cpu fetch-execute cycle - high-speed tedium 3.3 system bus - synchronous or asynchronous? 3.4 system clock - instruction cycle timing 3.5 pre-fetching - early efforts to speed things up 3.6 memory length - address width 3.7 endian-ness - microsoft vs. unix, or intel vs. motorola? 3.8 simple input-output - parallel ports 4 building computers from logic: the control unit 4.1 electronic lego and logic - the advantage of modular units 4.2 basic logic gates - truth tables for and, or, xor and not 4.3 truth tables and multiplexers - a simple but effective design tool 4.4 programmable logic - reconfigurable logic chips 4.5 traffic light controllers - impossible to avoid! 4.6 circuit implementation from truth tables - some practical tips 4.7 decoder logic - essential for control units and memories 4.8 cpu control unit - the 'brain' 4.9 washing machine controllers - a simple cu 4.10 risc vs. cisc decoding - in search of faster computers 5 building computers from logic: the alu 5.1 de morgan's equivalences - logical interchangeability 5.2 binary addition - half adders, full adders, parallel adders 5.3 binary subtraction - using two's complement integer format 5.4 binary shifting - barrel shifter 5.5 integer multiplication - shifting and adding 5.6 floating-point numbers - from very, very large to very, very small 6 building computers from logic: the memory 6.1 data storage - one bit at a time 6.2 memory devices - memory modules for computers 6.3 static memory - a lot of fast flip-flops 6.4 dynamic memory - a touch of analogue amid the digital 6.5 dram refreshing - something else to do 6.6 page access memories - edo and sdram 6.7 memory mapping - addressing and decoding 6.8 io port mapping - integration vs. differentiation 7 the intel pentium cpu 7.1 the pentium - a high-performance microprocessor 7.2 cpu registers - temporary store for data and address variables 7.3 instruction set - introduction to the basic pentium set 7.4 structure of instructions - how the cu sees it 7.5 cpu status flags - very short-term memory 7.6 addressing modes - building effective addresses 7.7 execution pipelines - the risc speedup technique 7.8 pentium 4 - extensions 7.9 microsoft developer studio - using the debugger 8 subroutines 8.1 the purpose of subroutines - saving space and effort 8.2 return address - introducing the stack 8.3 using subroutines - hll programming 8.4 the stack - essential to most operations 8.5 passing parameters - localizing a subroutine 8.6 stack frame - all the local variables 8.7 supporting hlls - special cpu facilities for dealing with subroutines 8.8 interrupt service routines - hardware-invoked subroutines 8.9 accessing operating system routines - late binding 9 simple input and output 9.1 basic io methods - polling, interrupt and dma 9.2 peripheral interface registers - the programmer's viewpoint 9.3 polling - single-character io 9.4 interrupt processing - service on demand 9.5 critical data protection - how to communicate with interrupts 9.6 buffered lo - interrupt device drivers 9.7 direct memory access (dma) - autonomous hardware 9.8 single-character io - screen and keyboard routines 10 serial connections 10.1 serial transmission - data, signals and timing 10.2 data format - encoding techniques 10.3 timing synchronization - frequency and phase 10.4 data codes and error control - parity, checksums, hamming codes and crcs 10.5 flow control - hardware and software methods 10.6 the 16550 uart- rs232.. 10.7 serial mice - mechanical or optical 10.8 serial ports - practical tips, avoiding the frustration 10.9 usb- universal serial bus 10.10 modems - modulating carrier waves 11 parallel connections 11.1 parallel interfaces - better performance 11.2 centronics - more than a printer port but less than a bus 11.3 scsi - the small computer systems interface 11.4 ide- intelligent drive electronics 11.5 at/isa - a computer standards success story 11.6 pci - peripheral component interconnection 11.7 plug-and-play - automatic configuration 11.8 pcmcia - personal computer memory card international association 12 the memory hierarchy 12.1 levels of performance - you get what you pay for 12.2 localization of access - exploiting repetition 12.3 instruction and data caches - matching memory to cpu speed 12.4 cache mapping - direct or associative 12.5 virtual memory- segmentation and demand paging 12.6 address formulation - when, where and how much 12.7 hard disk usage - parameters, access scheduling and data arrangement 12.8 performance improvement- blocking, caching, defragmentation, scheduling, ram disk 12.9 optical discs - cd-da, cd-rom, cd-rw and dvds 12.10 dvd - digital versatile disc 12.11 mpeg - video and audio compression 12.12 flash sticks - the new floppy disk part 2 networking and increased complexity 13 the programmer's viewpoint 13.1 different viewpoints - different needs 13.2 application user- office packages 13.3 systems administration - software installation and maintenance 13.4 hll programmer - working with java, c++, basic or c# 13.5 systems programming - assembler and c 13.6 hardware engineer- design and hardware maintenance 13.7 layered virtual machines - hierarchical description 13.8 assemblers- simple translators 13.9 compilers - translation and more 14 local area networks 14.1 reconnecting the users - email, printers and database 14.2 pc network interface - cabling and interface card 14.3 ethernet - carrier sense, multiple access/collision detect 14.4 lan addressing - logical and physical schemes 14.5 host names - another layer of translation 14.6 layering and encapsulation - tcp/ip software stack 14.7 networked file systems - sharing files across a network 14.8 interconnecting networks - gateways 14.9 socket programming- an introduction to winsock 15 wide area networks 15.1 the internet - origins 15.2 tcp/ip - the essential protocols 15.3 tcp - handling errors and flow control 15.4 ip routing - how packets find their way 15.5 dns- distributed name database 15.6 world wide web - the start 15.7 browsing the web - netscape navigator 15.8 http - another protocol 15.9 search engines- google 15.10 open systems interconnect - an idealized scheme 16 other networks 16.1 the pstn- telephones 16.2 cellnets - providers of mobile communications 16.3 atm - asynchronous transfer mode 16.4 messaging - radio paging and packet radio networks 16.5 isdn - totally digital 16.6 dsl - digital subscriber line 16.7 cable television - facilities for data transmission 17 introduction to operating systems 17.1 historic origins - development of basic functions 17.2 unix - a landmark operating system 17.3 outline structure - modularization 17.4 process management- initialization and dispatching 17.5 scheduling decisions- time-slicing, demand preemption or cooperative 17.6 task communication - pipes and redirection 17.7 exclusion and synchronization - semaphores and signals 17.8 memory allocation - malloc() and free() 17.9 user interface - guis and shells 17.10 input-output management - device handlers 18 windows xp 18.1 windows guis - responding to a need 18.2 win32 - the preferred user apl 18.3 processes and threads- multitasking 18.4 memory management- virtual memory implementation 18.5 windows registry- centralized administrative database 18.6 ntfs - windows nt file system 18.7 file access - acls, permissions and security 18.8 sharing software components - ole, dde and com 18.9 windows nt as a mainframe - winframe terminal server 19 filing systems 19.1 data storage - file systems and databases 19.2 the pc file allocation table - fat 19.3 unix inodes - they do it differently 19.4 microsoft ntfs - complexity and security 19.5 raid configuration - more security for the disk subsystem 19.6 file security - access controls 19.7 cd portable file system - multi-session contents lists 20 visual output 20.1 computers and graphics - capture, storage, processing and redisplay 20.2 pc graphics adapter cards - graphics coprocessors 20.3 laser printers - this is mechatronics! 20.4 adobe postscript - a page description language 20.5 wimps- remodelling the computer 20.6 win32 - graphical apl and more 20.7 the x window system - enabling distributed processing 20.8 mmx technology- assisting graphical calculations 21 risc processors: arm and sparc 21.1 justifying risc - increased instruction throughput 21.2 pipeline techniques - more parallel operations 21.3 superscalar methods - parallel parallelism 21.4 register files - many more cpu registers 21.5 branch prediction methods - maintaining the pipelines 21.6 compiler support - an essential part of risc 21.7 the arm 32 bit cpu - origins 21.8 strongarm processor - a 32 bit microcontroller 21.9 the hp ipaq - a strongarm pda 21.10 puppeteer - a strongarm sbc 21.11 sun sparc - scalar processor architecture as risc 21.12 embedded systems - cross-development techniques 22 vliw processors: the epic itanium 22.1 itanium 64 bit processor - introduction 22.2 itanium assembler - increasing the control of the cpu 22.3 run-time debugging - gvd/gdb 22.4 future processor design - debate 23 parallel processing 23.1 parallel processing-the basis 23.2 instruction-level parallelism (llp) - pipelining 23.3 superscalar - multiple execution units 23.4 symmetric, shared memory multiprocessing (smp) - the future? 23.5 single-chip multiprocessors - the ibm cell 23.6 clusters and grids - application-level parallelism appendix: ms visual studio 8, express edition glossary answers to end-of-chapter questions references index... |
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