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光通信集成电路设计(英文影印版)

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光通信集成电路设计(英文影印版)

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作 者:Behzad Razavi

出 版 社:清华大学出版社

出版时间:2005 年5月

I S B N:7302107203

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本书是具有先导性的研究者,美国加州大学洛杉矶分校(UCLA)教授B.Razavi,为研究生和实习工程师撰写的一本教材性质著作。本书系统地讲述了从基础的概念到高级的论题,严谨易懂,强调现代VLSI技术,尤其是CMOS技术的分析和设计,讲述了大量的电路技术,具有很高的参考价值。

内容简介

当工艺工程师通过改进工艺和开发新工艺,研制更高速晶体管来向上冲顶晶体管截止频率这一瓶颈时,电路设计工程师的任务就是应用已经开发出来的晶体管设计出尽可能高速,或称之为超高速的集成电路。由于40gb/s超高速数字信号频带的上限已经超过30ghz,进入毫米波频段,加上功能电路的多样性,光通信用集成电路的设计极具挑战性。
   初入门者无疑渴望有这方面的教材和书籍。本书正是具有先导性的研究者,美国加州大学洛杉矶分校(ucla)教授b.razavi,为研究生和实习工程师撰写的一本教材性质著作。本书系统地讲述了从基础的概念到高级的论题,严谨易懂,强调现代vlsi技术,尤其是cmos技术的分析和设计,讲述了大量的电路技术,具有很高的参考价值。

作者简介

Behzad Razavi received the B.Sc. degree in electrical engineering from Sharif University of Technology in 1985 and the M.Sc. and Ph.D. degrees in electrical engineering from Stanford University in 1988 and 1992, respectively. He was with AT&T Bell Laboratories and Hewlett-Packard Laboratories until 1996. Since September 1996, he has been Asso- ciate Professor and subsequently Professor of Electrical Engineering at the University of Califo.. << 查看详细

目录

introduction to optical communications
1.1 brief history
1.2 genedc optical system
1.3 design challenges
1.4 state of the art basic concepts
2.1 properties of random binary data
2.2 generation of random data
2.3 data formats
2.3.1 nrz and rz data
2.3.2 8b/10b coding
2.4 effect of bandwidth limitation on random data
2.4.1 effect of low-pass filtering
2.4.2 eye diagrams
2.4.3 effect of high-pass filtering
2.5 effect of noise on random data
2.6 phase noise and jitter
2.6.1 phase noise
2.6.2 jitter
2.6.3 relationship between phase noise and jitter
2.6.4 jitter due to additive noise
.2.7 transmission lines
2.7.1 ideal transmission lines
2.7.2 lossy transmission lines
3 optical devices
3.1 laser diodes
3.1.1 operation of lasers
3.1.2 types of lasers
3.1.3 properties of lasers
3.1.4 external modulation
3.2 optical fibers
3.2.1 fiber loss
3.2.2 fiber dispersion
3.3 photodiodes
3.3.1 responsivity and efficiency
3.3.2 pin diodes
3.3.3 avalanche photodiodes
3.4 optical systems
4 transimpedance amplifiers
4.1 general considerations
4.1.1 tia performance parameters
4.1.2 snr calculations
4.1.3 noise bandwidth
4.2 open-loop tias
4.2.1 low-frequency behavior
4.2.2 high-frequency behavior
4.3 feedback tias
4.3.1 first-ordertia
4.3.2 second-order tia
4.4 supply rejection
4.5 differential tias
4.6 high-performance techniques
4.6.1 gain boosting
4.6.2 capacitive coupling
4.6.3 feedback tias
4.6.4 inductive peaking
4.7 automatic gain control
4.8 case studies limiting amplifiers and output buffers
5.1 general considerations
5.1.1 performance parameters
5.1.2 cascaded gain stages
5.1.3 am/pm conversion
5.2 broadband techniques
5.2.1 inductive peaking
5.2.2 capacitive degeneration
5.2.3 cherry-hooper amplifier
5.2.4 ft doublers
5.3 output buffers
5.3.1 differential signaling
5.3.2 double termination
5.3.3 predriver design
5.4 distributed amplification
5.4.1 monolithic transmission lines
5.4.2 distributed amplifiers
5.4.3 distributed amplifiers with lumped devices oscillator fundamentals
6.1 general considerations
6.2 ring oscillators
6.3 lc oscillators
6.3.1 crossed-coupled oscillator
6.3.2 colpitts oscillator
6.3.3 one-port oscillators
6.4 voltage-controlled oscillators
6.4.1 tuning in ring oscillators
6.4.2 tuning in lc oscillators
7 lc oscillators
7.1 monolithic inductors
7.1.1 loss mechanisms
7.1.2 inductor modeling
7.1.3 inductor design guidelines
7.2 monolithic varactors
7.3 basic lc oscillators
7.3.1 differential control
7.3.2 design procedure.
7.4 quadrature oscillators
7.4.1 in-phase coupling
7.4.2 antiphase coupling phase. locked loops
8.1 simple pll
8.1.1 phase detector
8.1.2 basic pll topology
8.1.3 dynamics of simple pll
8.2 charge-pump plls
8.2.1 problem of lock acquisition
8.2.2 phase/frequency detector and charge pump
8.2.3 basic charge-pump pll
8.3 nonideal effects in plls
8.3.1 pfd/cp nonidealities
8.3.2 jitter in plls
8.4 delay-locked loops
8.5 applications
8.5.1 frequency multiplication and synthesis
8.5.2 skew reduction
8.5.3 jitter reduction clock and data recovery
9.1 general considerations
9.2 phase detectors for random data
9.2.1 hogge phase detector
9.2.2 alexander phase detector
9.2.3 half-rate phase detectors
9.3 frequency detectors for random data
9.4 cdr architectures
9.4.1 full-rate referenceless architecture
9.4.2 duai-vco architecture
9.4.3 dual-loop architecture with external reference
9.5 jitter in cdr circuits
9.5.1 jitter transfer
9.5.2 jitter generation
9.5.3 jitter tolerance
10 multiplexers and laser drivers
10.1 multiplexers
10.1.1 2-to-1 mux
10.1.2 mux architectures
10.2 frequency dividers
10.2.1 flipflop dividers
10.2.2 miller divider
10.3 laser and modulator drivers
10.3.1 performance parameters
10.4 design principles
10.4.1 power control
index

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