| 《专用集成电路时序验证》：国外大学优秀教材，微电子类系列(影印版) |
| 内库加（Farzad Nekoogar） is Director of Design Services at SiliconDesigns International. Farzad has extensive practical expe-rience verifying timing ofASICs, FPGAs, and systems-on-a-chip. He is the author of Digital Control Using Digital Sig-nal Processing, published by Prentice Hall PTR. He has lec-tured at the University of California at Berkeley on signalprocessing, control systems, and theoretical physics （specifi-cally, Superstring Theory）. He is currently a lecturer at theDepartment of Applied Science at the University of Califor-nia at Davis. Farzad, seen here in December 1992 at Stanford University, with Sir Roger Penrose.Farzad writes: "In this book we try to solve timing issues related to design of micro-chips. I am honored to be pictured here with Sir Roger Penrose, one of the most bril-liant scientists of all time, who has authored some of the most complex theories aboutspace-time, contributing a lot to our understanding of the universe." |
| list of figures list of tables preface acknowledgments 1 introduction to timing verification 1.1 introduction 1.2 overview of timing verification 1.2.1 intrinsic vs. extrinsic delay 1.2.2 path delay 1.3 interface timing analysis elements of timing verification 2.1 introduction 2.2 clock definitions 2.2.1 gated clocks 2.2.2 clock skews and multiple clock groups 2.2.3 multifrequency clocks 2.2.4 multiphase clocks 2.3 more on sta …… timing in asica 4 programmable logic based design a primetime b pearl c timingdesigner d transistor-level timing verification references index about the author |
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