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| The LNCS series reports state-of-the-art results in computer science research, development, and education, at a high level and in both printed and electronic form. Enjoying tight cooperation with the R&D community,with numerous individuals, as well as with prestigious organizations and societies, LNCS has grown into the most comprehensive computer science research forum available. The scope of LNCS, including its subseries LNAI and LNBI, spans the whole range of computer science and information technology including interdisciplinary topics in a variety of application fields. The type of material published traditionally includes -proceedings (published in time for the respective conference) -post-proceedings (consisting of thoroughly revised final full papers) -research monographs (which may be based on outstanding PhD work,research projects, technical reports, etc.) |
| Session 1: Low-Power Processors A Power-Efficient and Scalable Load-Store Queue Design Power Consumption Reduction Using Dynamic Control of Micro Processor Performance Low Power Techniques Applied to a 80C51 Microcontroller for High Temperature Applications Dynamic Instruction Cascading on GALS Microprocessors Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width Session 2: Code Optimization for Low-Power A Retargetable Environment for Power-Aware Code Evaluation:An Approach Based on Coloured Petri Net Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory Energy Characterization of Garbage Collectors for Dynamic Applications on Embedded Systems Optimizing the Configuration of Dynamic Voltage Scaling Points in Real-Time Applications Session 3: High-Level Design Systematic Preprocessing of Data Dependent Constructs for Embedded Systems Temperature Aware Datapath Scheduling Memory Hierarchy Energy Cost of a Direct Filtering Implementation of the Wavelet Transform Improving the Memory Bandwidth Utilization Using Loop Transformations Power-Aware Scheduling for Hard Real-Time Embedded Systems Using Voltage-Scaling Enabled Architectures Session 4: Telecommunications and Signal Processing Design of Digital 'Filters for Low Power Applications Using Integer Quadratic Programming A High Level Constant Coefficient Multiplier Power Model for Power Estimation on High Levels of Abstraction An Energy-Tree Based Routing Algorithm in Wireless Ad-Hoc Network Environments Energy-Aware System-on-Chip for 5 GHz Wireless LANs Low-Power VLSI Architectures for OFDM Transrmtters Based on PAPR Reduction Session 5: Low-Power Circuits An Activity Monitor for Power/Performance Tuning of CMOS Digital Circuits …… Session 6:System-on-Chip Design Session 7:Busses and Interconnections Session 8:Modeling Seesion 9:Design Automation Session 10:Low-Power Techniques Session 11:Memory and Register Files Poster Session 1:Applications Poster Session 2:Digital Circuits Poster Session 3:Analog and Physical Design Special Session:Digital Hheraing Aids:Challenges and Solutions for Ultra Low Power Invited Talks Author Index |
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