最 低 价：￥27.60
| Chapter 1 Digital System Design Automation with Verilog 1.1 Digital Design Flow 1.2 Verilog HDL 1.3 Summary Problems Suggested Reading Chapter 2 Register Transfer Level Design with Verilog 2.1 RT Level Design 2.2 Elements of Verilog 2.3 Component Description in Verilog 2.4 Testbenches 2.5 Summary Problems Suggested Reading Chapter 3 Verilog Language Concepts 3.1 Characterizing Hardware Languages 3.2 Module Basics 3.3 Verilog Simulation Model 3.4 Compiler Directives 3.5 System Tasks and Functions 3.6 Summary Problems Suggested Reading Chapter 4 Combinational Circuit Description 4.1 Module Wires 4.2 Gate Level Logic 4.3 Hierarchical Structures 4.4 Describing Expressions with Assign Statements 4.5 Behavioral Combinational Descriptions 4.6 Combinational Synthesis 4.7 Summary Problems Suggested Reading Chapter 5 Sequetial Circuit Description 5.1 Sequential Models 5.2 Basic Memory Components 5.3 Functional Registers 5.4 State Machine Coding 5.5 Sequential Synthesis 5.6 Summary Problems Suggested Reading Chapter 6 Component Test Verification 6.1 Testbench 6.2 Testbench Techniques 6.3 Design Verification 6.4 Assertion Verification 6.5 Text Based Testbenches 6.6 Summary Problems Suggested Reading Chapter 7 Detailed Modeling 7.1 Switch Level Modeling 7.2 Strength Modeling 7.3 Summary Problems Suggested Reading Chapter 8 RT Level Design and Test 8.1 Sequential Multiplier 8.2 von Neumann Computer Model 8.3 CPU Design and Test 8.4 Summary Problems Suggested Reading Appendix A List of Keywords Appendix B Frequently Used Syetem Taske and Functions Appendix C Compiler Directives Appendix D Verilog Formal Syntax Definition Appendix E Verilog Assertion Monitors |
![Microchip PIC系列单片机原理、应用与开发[按需印刷]](http://images.china-pub.com/ebook15001-20000/15432/zcover.jpg)
内容加载中，请稍后...
商品评论（0条）